Walsh Spectral Techniques for Logic Synthesis FPGA
Nhan Khanh Huu Nguyen
DOI: 10.15598/aeee.v13i2.1117
Abstract
The implementation value of multi-output Boolean functions in logic synthesis FPGA can be reduced by using Walsh spectral representation. This paper proposes an algorithm for calculating the maximum coefficient of the autocorrelation function of BF without generating a truth table, using the heuristic procedure limits the maximum autocorrelation coefficients of sorting on a small subset of the function. We also suggest a spectral technique of the linear function transformation defined by disjoint cubes. This method for decomposition of BF, which allows to reducing the complexity of the linear part of the corresponding blocks about 25-55%, and the complexity of the nonlinear part of the blocks do not increase more than 10%, compared to the traditional approach.