Analysis Of Harmonic Mitigation Techniques For Cascaded Asymmetric Inverters
Lakshmi Prasanna, Jyothsna T.r.
DOI: 10.15598/aeee.v22i1.5641
Abstract
Multilevel inverters (MLIs) are attracting the attention of academics as well as industry as a feasible technology for an extensive variety of purposes, like renewable energy sources, and Electric vehicles. MLIs are commonly employed as a part of the sophisticated converter configurations in both high and medium voltage applications. The creation of minimised switch MLI structures remains a key objective of the present research with the goal to achieve superior results despite of involved a greater number of switches. Basically, various layouts of asymmetrical configuration using enhanced cascaded bridge topologies are identified in a brief overview and evaluated against important parameters. It is a method of designing multiple voltage levels using identical switch count and fewer devices. This work describes numerous varieties of harmonic mitigation techniques, and it also outlines the most effective switching angle optimizations to produce various levels. Furthermore, the effectiveness of configuration is evaluated based on minimising THD due to decreasing lower order harmonics. THD is evaluated against various mitigation techniques employing certain proportions of source voltages coming from solar energy /batteries. THD is calculated theoretically and contrasted to simulation outcomes for the suggested configurations. The simulated waveforms of various configurations are examined using Hardware in loop (HIL) application.